Backplane interconnect test in a boundary-scan environment

Abstract

We present algorithms for generating and applying backplane interconnect test in a boundary-scan environment. Several unique characteristics distinguish backplane interconnect test from intra-board interconnect test. We address these special characteristics and provide a solution that reduces test data volume, accommodates dynamic backplane configuration, resolve test synchronization issue and supports uses of different board technologies. We propose a walking-enable test algorithm that guarantees high fault coverage and fine diagnosis resolution. The simplicity of the walking-enable test algorithm enables straightforward implementations. Other algorithms are also presented to provide trade-offs between test application time,fault coverage and diagnosis resolution. The proposed algorithms can also be used for testing cables that connect boards or backplanes.