IEEE Transactions on Circuits & Systems II Express Briefs · 2008 · 21 citations · 4 references
EngineeringComputer EngineeringDynamical SystemsMicroelectronicsSystems ModelingDelay ModelingFinite State Machine ModelingMarkov ChainsTiming AnalysisTiming ModelingBang-bang ControlDelay-locked LoopsGainPhase-locked Loop ModelingPhase-locked LoopsStatistical Delay ModelingZero Delay Modeling
<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> A method to solve the stationary state probability is presented for the first-order bang-bang phase-locked loop (BBPLL) with nonzero loop delay. This is based on a delayed Markov chain model and a state flow diagram for tracing the state history due to the loop delay. As a result, an eigenequation is obtained, and its closed form solutions are derived for some cases. After obtaining the state probability, statistical characteristics such as mean gain of the binary phase detector and timing error variance are calculated and demonstrated. </para>
4
Jitter transfer analysis of tracked oversampling techniques for multigigabit clock and data recovery
Youngdon Choi, Deog‐Kyoon Jeong, Wonchan Kim · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2003 · 50 citations
Engineering, Computer Engineering, Electrical Engineering +17