Nicola Da Dalt - Concepedia

Author

Nicola Da Dalt

Infineon Technologies (Austria)

Also Known As

N Da Dalt, N. Da Dalt, Nicola Da Dalt, Nicola da Dalt

Publications

1.2K

Citations

H-Index

Concepts

All Affiliations

Infineon Technologies (Austria)Infineon Technologies (Germany)University of Udine University of Padua Istituto Nazionale di Fisica Nucleare, Sezione di Padova

About

Nicola Da Dalt is an author at Infineon Technologies (Austria) specializing in engineering, computer engineering, and signal processing.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	14	17	912
2	Computer Engineering	13	15	848
3	Electrical Engineering	8	8	306
4	Applied Physics	1	1	24
5	Computer Science	1	1	63

Nicola Da Dalt

Publications

Citations

H-Index

Page 1

	Year	Citations
A design-oriented study of the nonlinear dynamics of digital bang-bang PLLs Nicola Da Dalt IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications Low JitterEngineeringPhysicsClock RecoveryNonlinear Circuit	2005	146
On the jitter requirements of the sampling clock for analog-to-digital converters Nicola Da Dalt, M. Harteneck, Christoph Sandner, IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications EngineeringClock RecoveryData ConverterMixed-signal Integrated CircuitAnalog Design	2002	115
Linearized Analysis of a Digital Bang-Bang PLL and Its Validity Limits Applied to Jitter Transfer and Jitter Generation Nicola Da Dalt IEEE Transactions on Circuits and Systems I Regular Papers EngineeringAnalog-to-digital ConverterClock RecoveryHard NonlinearityJitter Generation	2008	110
Markov Chains-Based Derivation of the Phase Detector Gain in Bang-Bang PLLs Nicola Da Dalt IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing Linear SystemsEngineeringPhysicsPhase Detector GainLinearized Bpd	2006	97
A compact triple-band low-jitter digital LC PLL with programmable coil in 130-nm CMOS Nicola Da Dalt, Edwin Thaller, Peter Gregorius, IEEE Journal of Solid-State Circuits Electrical EngineeringLc OscillatorEngineeringVlsi DesignDigital Plls	2005	80
A 1.4psrms-period-jitter TDC-less fractional-N digital PLL with digitally controlled ring oscillator in 65nm CMOS Werner Grollitsch, Roberto Nonis, Nicola Da Dalt Electrical EngineeringEngineeringArt Digital PllsClock RecoveryTiming Analysis	2010	71
digPLL-Lite: A Low-Complexity, Low-Jitter Fractional-N Digital PLL Architecture Roberto Nonis, Werner Grollitsch, Thomas Santa, IEEE Journal of Solid-State Circuits Hardware SecurityLow JitterEngineeringLow Architecture ComplexityClock Recovery	2013	63
Modeling, design and characterization of a new low-jitter analog dual tuning LC-VCO PLL architecture Roberto Nonis, Nicola Da Dalt, Pierpaolo Palestri, IEEE Journal of Solid-State Circuits Lc-vco PllNew Low-jitter AnalogVlsi DesignHigh-frequency DeviceMixed-signal Integrated Circuit	2005	61
An Analysis of Phase Noise in Realigned VCOs Nicola Da Dalt IEEE Transactions on Circuits & Systems II Express Briefs Realigned VcoElectrical EngineeringEngineeringMixed-signal Integrated CircuitAnalog Design	2014	38
A subpicosecond jitter PLL for clock generation in 0.12-μm digital CMOS Nicola Da Dalt, Christoph Sandner IEEE Journal of Solid-State Circuits 0.12-μM Digital CmosElectrical EngineeringEngineeringVlsi DesignClock Generation	2003	38

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