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Robust Cu Dual Damascene Interconnects With Porous SiOCH Films Fabricated by Low-Damage Multi-Hard-Mask Etching Technology
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Citations
10
References
2006
Year
EngineeringPlasma ProcessingInterconnect (Integrated Circuits)Wafer Scale ProcessingAdvanced Packaging (Semiconductors)NanoelectronicsMaterials FabricationElectronic PackagingThin Film ProcessingMaterials Science3D Ic ArchitectureSemiconductor Device FabricationMicroelectronicsPlasma EtchingPorous Sioch FilmFluorocarbon PlasmaFlexible ElectronicsMicrofabricationPorous Sioch FilmsSurface ScienceApplied PhysicsThin FilmsLow-damage Hard-maskSurface ProcessingChemical Vapor Deposition
Low-damage hard-mask (HM) plasma-etching technology for porous SiOCH film (k=2.6) has been developed for robust 65-nm-node Cu dual damascene interconnects (DDIs). No damage is introduced by fluorocarbon plasma etching irrespective of whether rigid (k=2.9) or porous (k=2.6) SiOCH films are used, due to the protective CF-polymer layer deposited on the etched sidewall. The etching selectivity of the SiOCH films to the inorganic HMs is kept high by controlling the radical ratio of carbon relative to oxygen in the etching plasma gas. However, oxidation damage penetrates the films from the sidewalls due to the O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> plasma used for photoresist ashing. This damage is increased by the porous structure. As a result, we developed a via-first multi-hard-mask process for the DD structure in porous SiOCH film with no exposure to O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -ashing plasma, and we controlled the via-taper angle by RF bias during etching. We fabricated robust Cu DDIs with tapered vias in porous SiOCH film that can be applied to 65-nm-node ULSIs and beyond
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