Mechanism of high-k dielectric-induced breakdown of the interfacial SiO<inf>2</inf> layer

Abstract

A mechanism of degradation and breakdown in high-k/metal gate transistors was investigated. Based on the electrical test, physical analysis, and modeling results, we propose that the breakdown path formation/evolution in the interfacial SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> layer is associated with the growth of an oxygen-deficient filament facilitated by the grain boundaries of the overlaying high-k film. The model allows reproducing SILC temperature dependency and its exponential increase from the fresh through soft and progressive breakdown phases.