2004 · 44 citations · 9 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingConfigurable Logic BlocksDesign For TestabilityField-programmable Gate Array ArchitectureFpga ArchitectureInterconnect ArchitectureInterconnect DesignEmbedded TestField-programmable Gate Array TestabilityInterconnect OptimizationLogic Block DesignReconfigurable Logic Blocks
An application-dependent test strategy to be used by an FPGA user is presented which requires only 3 test configurations. In this specific strategy, the interconnect is first tested by modifying the logic block configuration and preserving the interconnect configuration. Then, the used logic blocks are fully tested by modifying the interconnect configuration. Results for some benchmark applications mapped into the Xilinx FPGAs are also provided.
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IS-FPGA : a new symmetric FPGA architecture with implicit scan
M. Renovell, P. Faure, J.M. Portal et al. · 2002 · 43 citations