M. Renovell

Testing the interconnect of RAM-based FPGAs

M. Renovell, J.M. Portal, Joan Figueras et al. · IEEE Design & Test of Computers · 1998 · 158 citations

Hardware Security, Expensive Procedure, Engineering +15

Test of RAM-based FPGA: methodology and application to the interconnect

M. Renovell, Joan Figueras, Y. Zorian · 2002 · 114 citations

Hardware Security, Electrical Engineering, Engineering +13

Scan design and secure chip [secure IC testing]

David Hély, Marie-Lise Flottes, F. Bancel et al. · 2004 · 93 citations · Full text

Hardware Trojan, Engineering, Information Security +19

Electrical analysis and modeling of floating-gate fault

M. Renovell, G. Cambon · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1992 · 89 citations

Hardware Security, Device Modeling, Electrical Engineering +14

The concept of resistance interval: a new parametric model for realistic resistive bridging fault

M. Renovell, P. Huc, Yves Bertrand · 2002 · 86 citations

Fault Geometry, Electrical Engineering, Reliability Engineering +15