Parameterized All-Digital PLL Architecture and its Compiler to Support Easy Process Migration

Chao-Wen Tzeng, Shi‐Yu Huang, Pei-Ying Chao

IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2013 · 43 citations · 9 references

Concepts

Abstract

In this paper, we propose a parameterized digitally controlled oscillator that can produce oscillating-clock signal with the tunable frequency covering an entire designated range. Moreover, we formulate the all-digital phase-locked loop optimization process as a search problem, during which we can find a good configuration that not only meets the user-defined requirement but also achieves a smaller area and lower power consumption than a typical manual design. The silicon measurement results show that this is indeed a promising new alternative for analog phase-locked loops, especially for advanced nanometer technologies.

References

9