Alain Greiner

A generic architecture for on-chip packet-switched interconnections

Pierre Guerrier, Alain Greiner · 2000 · 828 citations

Generic Architecture, Dominant Template, Engineering +13

A generic architecture for on-chip packet-switched interconnections

Pièrre Guerrier, Alain Greiner · Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) · 2002 · 317 citations

Generic Architecture, Dominant Template, Engineering +13

A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip

Zhen Zhang, Alain Greiner, Sami Taktak · 2008 · 227 citations · Full text

Cluster Computing, Engineering, Computer Architecture +17

SPIN: a scalable, packet switched, on-chip micro-network

A. Adriahantenaina, Hervé Charlery, Alain Greiner et al. · 2003 Design, Automation and Test in Europe Conference and Exhibition · 2003 · 189 citations

System On Chip, Spin Architecture Relies, Engineering +11

IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management

Pascal Vivet, Èric Guthmuller, Yvain Thonnart et al. · IEEE Journal of Solid-State Circuits · 2020 · 118 citations · Full text

Artificial Intelligence, Engineering, Vlsi Design +26