Phase-locked Loop Design
Phase-Locked Loop Design is a specialized methodology within mixed-signal integrated circuit design that integrates feedback control techniques to synchronize the phase and frequency of an output signal with a reference input through precise analog and digital co-design.
869
Publications
38K
Citations
2.5K
Authors
640
Institutions
Publications per year
2017–2026
177
Variants
Pll Design
869
1–5 of 869
2.5K
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640

National Taiwan University
Taipei, Taiwan
20 h-index
66 publications
2.4K citations
University of California, Los Angeles
Los Angeles, United States
18 h-index
46 publications
2.3K citations
Aalborg University
Aalborg, Denmark
16 h-index
34 publications
6.1K citations
Texas Instruments (United States)
Dallas, United States
14 h-index
59 publications
3.6K citations
Intel (United States)
Santa Clara, United States
14 h-index
53 publications
2.5K citations
Seoul National University
Seoul, South Korea
13 h-index
74 publications
2.8K citations
Politecnico di Milano
Milan, Italy
13 h-index
72 publications
3.3K citations
Korea Advanced Institute of Science and Technology
Daejeon, South Korea
13 h-index
37 publications
1.7K citations
1–8 of 640
130 publications · 8.9K citations
51
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38 publications · 1.4K citations
24
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26 publications · 838 citations
18
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19 publications · 3.1K citations
18
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27 publications · 792 citations
18
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