A phase tracking system for three phase utility interface inverters

TLDR

The paper analyzes and designs a PLL‑based phase tracking system for three‑phase utility interface inverters. The authors model the PLL dynamics in continuous and discrete domains, optimize a second‑order design, analyze performance under phase unbalance, harmonics, and load‑induced offsets, and implement the system on a DSP for validation. The study derives tracking errors under distorted utility conditions and identifies design considerations based on analytic and experimental findings.

Abstract

The analysis and design of the phase-locked loop (PLL) system is presented for the phase tracking system of the three phase utility interface inverters. The dynamic behavior of the closed loop PLL system is investigated in both continuous and discrete-time domains, and the optimization method is considered for the second order PLL system. In particular, the performance of the three phase PLL system is analyzed in the distorted utility conditions such as the phase unbalancing, harmonics, and offset caused by the nonlinear load conditions and measurement errors. The tracking errors under these distorted utility conditions are also derived. The phase tracking system is implemented in a digital manner using a digital signal processor (DSP) to verify the analytic results. The design considerations for the phase tracking system are deduced from the analytic and experimental results.