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InP/GaAsSb DHBTs Fabricated in a Low-Temperature Teflon Planarization Process
23
Citations
9
References
2012
Year
SemiconductorsSemiconductor TechnologyElectrical EngineeringElectronic DevicesCutoff FrequenciesEngineeringRf SemiconductorNanoelectronicsApplied PhysicsQuantum MaterialsLow-temperature Planarization ProcessElectronic PackagingMicroelectronicsInp/gaassb Dhbts FabricatedSemiconductor DevicePolyimide Planarization Dielectrics
We demonstrate InP/GaAsSb/InP double heterojunction bipolar transistors (HBTs) fabricated in a low-temperature planarization process based on a spin-on Teflon amorphous fluoropolymer interlevel dielectric with ε <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">r</sub> = 1.9 and a low dissipation factor. Devices with 0.3-μm-wide emitters show excellent junction characteristics, cutoff frequencies f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> = 362 GHz and f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MAX</sub> = 450 GHz, a peak current gain β = 28, and a common-emitter breakdown voltage BV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CEO</sub> = 5.1 V. Teflon is seen to be an advantageous alternative to common benzocyclobutene and polyimide planarization dielectrics. A side-by-side comparison of devices fabricated in Teflon and airbridge processes shows nearly identical performances. The present approach is equally applicable to GaAs- and GaInAs-based HEMT and HBT technologies.
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