RF characterization and modelling of high density Through Silicon Vias for 3D chip stacking - Concepedia

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RF characterization and modelling of high density Through Silicon Vias for 3D chip stacking

25

Citations

5

References

2009

Year

L. Cadix, C. Bermond, C. Fuchs, A. Farcy, Philip R. LeDuc, L. DiCioccio, M. Assous, Maxime Rousseau, F. Lorut, Laurent Chapelon,

Microelectronic Engineering

High Density3D Ic ArchitectureElectrical EngineeringPhysical Design (Electronics)EngineeringChip-scale PackageAdvanced Packaging (Semiconductors)MicrofabricationNanoelectronicsApplied PhysicsRf CharacterizationComputational ElectromagneticsElectronic PackagingMicroelectronics3D PrintingChip Stacking

References

	Year	Citations

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