Publication | Open Access
Breakdown in the metal/high-k gate stack: Identifying the “weak link” in the multilayer dielectric
73
Citations
10
References
2008
Year
Unknown Venue
Gate Stack DegradationElectrical EngineeringEngineeringCrystalline DefectsMultilayer DielectricStress-induced Leakage CurrentSurface ScienceApplied PhysicsCondensed Matter PhysicsTime-dependent Dielectric BreakdownInterfacial LayerMultilayer HeterostructuresSemiconductor Device FabricationSystematic ApproachDefect FormationWeak LinkMicroelectronicsMetal/high-k Gate Stack
We apply a systematic approach to identify a high-k/metal gate stack degradation mechanism. Our results demonstrate that the SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interfacial layer controls the overall degradation and breakdown of the high-k gate stacks stressed in inversion. Defects contributing to the gate stack degradation are associated with the high-k/metal-induced oxygen vacancies in the interfacial layer.
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