Fine-Grained Power-Gating Scheme of a Metal–Oxide–Semiconductor and Magnetic-Tunnel-Junction-Hybrid Bit-Serial Ternary Content-Addressable Memory

Abstract

A fine-grained power-gating scheme combining metal–oxide–semiconductor (MOS) transistors with magnetic-tunnel-junction (MTJ) devices, where storage data still remains even if the power supply is cut off, is proposed for an ultra low-power bit-serial ternary content-addressable memory (TCAM). Once a mismatched result is detected in a sequence of a bit-level equality-search operation, the power supply of all the cells in the word circuit is cut off, which greatly reduces the standby power dissipation in the word circuit. The standby power dissipation of the proposed TCAM in the standby mode is reduced to about 1.2% in comparison with that of a complementary MOS (CMOS)-only-based TCAM. Moreover, the power-delay product of the proposed TCAM is reduced to 15.5% in comparison with that of the corresponding CMOS-only-based TCAM.