Shoun Matsunaga - Concepedia

Author

Shoun Matsunaga

Tohoku University

Also Known As

Shoun Matsunaga

Publications

797

Citations

H-Index

Concepts

All Affiliations

Tohoku University Spintronics Research Network of Japan Hitachi (Japan)NEC (Japan)University of Waterloo

About

Shoun Matsunaga is an author at Tohoku University specializing in computer engineering, computer architecture, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	12	14	746
2	Computer Engineering	12	14	746
3	Electrical Engineering	12	12	706
4	Applied Physics	6	6	514
5	Computer Science	4	4	138

Shoun Matsunaga

Publications

763

Citations

H-Index

Page 1

	Year	Citations
Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Applied Physics Express Non-volatile MemoryEngineeringVlsi DesignNonvolatile Memory ElementsEmerging Memory Technology	2008	343
Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices Shoun Matsunaga, Kimiyuki Hiyama, Atsushi Matsumoto, Applied Physics Express Non-volatile MemoryEngineeringEmerging Memory TechnologyFerroelectric Random-access Memory3D Memory	2009	84
A 3.14 um<sup>2</sup> 4T-2MTJ-cell fully parallel TCAM based on nonvolatile logic-in-memory architecture Shoun Matsunaga, S. Miura, Hiroaki Honjou, Non-volatile MemoryEngineeringEmerging Memory TechnologyComputer ArchitectureCell Size	2012	81
Fully parallel 6T-2MTJ nonvolatile TCAM with single-transistor-based self match-line discharge control Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Non-volatile MemoryElectrical EngineeringEngineeringCell CircuitParallel Nonvolatile Tcam	2011	43
Design of a Nine-Transistor/Two-Magnetic-Tunnel-Junction-Cell-Based Low-Energy Nonvolatile Ternary Content-Addressable Memory Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Japanese Journal of Applied Physics Non-volatile MemoryElectrical EngineeringEngineeringNanoelectronicsEmerging Memory Technology	2012	28
Design of a 270ps-access 7-transistor/2-magnetic-tunnel-junction cell circuit for a high-speed-search nonvolatile ternary content-addressable memory Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Journal of Applied Physics Non-volatile MemoryElectrical EngineeringEngineeringCell CircuitNanoelectronics	2012	27
Design of a Nine-Transistor/Two-Magnetic-Tunnel-Junction-Cell-Based Low-Energy Nonvolatile Ternary Content-Addressable Memory Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Japanese Journal of Applied Physics Non-volatile MemoryElectrical EngineeringEngineeringNanoelectronicsEmerging Memory Technology	2012	24
High-Throughput Low-Energy Self-Timed CAM Based on Reordered Overlapped Search Mechanism Naoya Onizawa, Shoun Matsunaga, Vincent Gaudet, IEEE Transactions on Circuits and Systems I Regular Papers Event CameraEngineeringComputer ArchitectureHspice SimulationHardware Security	2013	21
High-Throughput Low-Energy Content-Addressable Memory Based on Self-Timed Overlapped Search Mechanism Naoya Onizawa, Shoun Matsunaga, Vincent Gaudet, Hardware SecurityLow Search EnergyNon-volatile MemoryEngineeringHigh-performance Architecture	2012	19
Fine-Grained Power-Gating Scheme of a Metal–Oxide–Semiconductor and Magnetic-Tunnel-Junction-Hybrid Bit-Serial Ternary Content-Addressable Memory Shoun Matsunaga, Masanori Natsui, Kimiyuki Hiyama, Japanese Journal of Applied Physics Non-volatile MemoryEngineeringEmerging Memory TechnologyComputer ArchitectureFerroelectric Random-access Memory	2010	18

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