Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions

TLDR

Nonvolatile logic‑in‑memory architecture, which distributes memory elements across a logic plane, promises ultra‑low power consumption and reduced interconnection delay. The authors fabricated a full adder by integrating MgO‑based magnetic tunnel junctions—offering high tunnel magneto‑resistance and spin‑injection write capability—with 0.18 µm CMOS transistors. Experimental results confirm the correct operation of the full adder.

Abstract

Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced interconnection delay. We have fabricated a nonvolatile full adder based on logic-in-memory architecture using magnetic tunnel junctions (MTJs) in combination with metal oxide semiconductor (MOS) transistors. Magnesium oxide (MgO) barrier MTJs are used to take advantage of their high tunnel magneto-resistance (TMR) ratio and spin-injection write capability. The MOS transistors are fabricated using a 0.18 µm complementary metal oxide semiconductor (CMOS) process. The basic operation of the full adder is confirmed.