Publication | Closed Access
128Gb 3b/cell NAND flash memory in 19nm technology with 18MB/s write rate and 400Mb/s toggle mode
46
Citations
5
References
2012
Year
Unknown Venue
Non-volatile MemoryElectrical EngineeringToggle ModeEngineeringNeighbor InterferenceFlash MemoryWrite RateComputer ArchitectureComputer EngineeringIsscc 2008Memory DevicesSemiconductor MemoryTechnologyMicroelectronicsNand Flash MemoryMemory ArchitectureX3 Nand3D Memory
Since the first 3b/cell (X3) NAND flash memory paper in ISSCC 2008 [1], market demand for applications using high-density low-cost flash memory such as tablets, smart phones, and SSDs, has increased rapidly. Various electronic devices already use X3 NAND. The use of all BL (ABL) architecture, advanced circuitry, and enhanced algorithms enables this work to achieve 18MB/s performance, allowing penetration of markets where 2b/cell (D2) NAND has been used. As NAND memory scales aggressively towards 10nm, achieving the same level of performance with X3 chips is increasingly difficult. This paper addresses challenges with improvements made over previous NAND generations to achieve high performance while maintaining a low fail-bit count (FBC) and cost savings from an improved architecture and tightly packed peripheral circuits. Air gap [2,3] technology further improves write throughput by reducing neighbor interference and WL RC. A toggle mode 400Mb/s I/O interface reduces system overhead and enhances overall performance.
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