Enhanced Performance of P-FET Omega-Gate SoI Nanowire With Recessed-SiGe Source-Drain Down to 13-nm Gate Length

Abstract

Ultrashort gate length silicon-on-insulator nanowire (NW) transistors with embedded source/drain (S/D) SiGe stressors were fabricated. An enhancement of P-FET NW performance is achieved using in situ HCl+GeH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> etching and selective epitaxial growth of boron-doped Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.7</sub> Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.3</sub> for the formation of recessed S/D. For the first time, an ION current improvement of +100% along the 〈110〉 direction induced by SiGe S/D is achieved in Omega-FET NWs down to 13-nm gate length. The current enhancement coming from uniaxial compressive strain of recessed SiGe S/D stressors in narrow-channel transistors is well demonstrated (+100% versus +40% in wide planar FET).