Alternative techniques to reduce interface traps in n‐type 4H‐SiC MOS capacitors

Abstract

Abstract Several alternative oxidation techniques are developed and tested with the aim to reduce the high density of interface traps D it in n‐type 4H‐SiC MOS capacitors. A lamp furnace in combination with a microwave plasma is employed to grow thin oxide layers, which are used for an insulating stack (SiO 2 and Al 2 O 3 ). The treatment of the oxide with nitrogen is another way to lower D it . We introduce N atoms prior to the oxidation by ion implantation. During the oxidation process, the implanted N‐profile is redistributed; a considerable amount of the implanted N is accumulated at the SiC/SiO 2 ‐interface, which leads to a strong reduction of D it and a large negative flatband voltage. The negative flatband voltage can largely be compensated by coimplantation of aluminum. A model is proposed, which explains the passivation of interface traps in n‐type 4H‐SiC MOS capacitors. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)