IBM Journal of Research and Development · 1982 · 15 citations · 2 references
EngineeringComputer EngineeringElectrical EngineeringComputer ArchitecturePackaging DesignChip PackagingCmos Circuit DesignDigital Integrated Circuit DesignDigital Logic DesignIntegrated Circuit DesignLogic SynthesisCombinational Logic DesignDigital Logic CircuitsLogic Family DesignLogic OptimizationModular Packaging Design
The paper provides a description of the behavior of lead reduction among combinatorial logic circuits. Methods by which one may design the lead reduction architecture for modular packaging schemes are developed. The methods are then applied to the design of the lead reduction architecture of an integrated circuit chip and a nine-chip cell.
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