Publication | Closed Access
A 45nm 1Gb 1.8V phase-change memory
100
Citations
3
References
2010
Year
Unknown Venue
Non-volatile MemoryEngineeringEmerging Memory TechnologyComputer ArchitectureFerroelectric Random-access MemoryGate ScalingPhase Change MemoryComputer Memory3D MemoryMemory DeviceMemory DevicesPhase-change MemoryElectrical EngineeringElectronic MemoryComputer EngineeringMagnetoresistive Random-access MemoryFloating-gate Flash MemoriesMicroelectronicsMemory ReliabilityMemory ArchitectureAddress/data MuxResistive Random-access Memory
Floating-gate Flash memories have been able so far to satisfy the market requirements, especially for the portable equipments, and to be the mainstream non-volatile memory (NVM) technology [1]. Projecting into the next decade, though, there are several limitations that must be faced to further scale the floating-gate concept. The increasing complexity of floating gate scaling has left room for the investigation of alternative NVM concepts. Phase-change memory (PCM) technology is the only one of the proposed alternative technologies that is demonstrating the capability to enter in the broad NVM market and to become mainstream in the next decade [2]. PCM, based on the property of chalcogenide materials that have two stable states, amorphous and crystalline, with different electrical resistivity values, provides a new set of features interesting for novel applications, combining features of NVM and DRAM and being at the same time a sustaining and a disruptive technology. PCM can be exploited by the memory system resulting from the convergence of consumer, computer and communication electronics. In this paper, we present a read-while-write 45nm [3] 1Gb non-volatile memory based on phase-change Ge <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> Sb <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> Te <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</inf> (GST) alloy. The device implements 3 specifications that are compatible with existing NOR products for embedded and wireless market with no mux, address/data mux (ADMux) and address/address/data mux (AADMux) interfaces. An extended command set that allows bit-alterability is also included.
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