Concepedia
Integration · 1995 · 90 citations · 25 references
EngineeringComputer EngineeringComputer ScienceFault-tolerant ComputingMicroelectronicsBuilt-in Self-testDelay ModelingDesign For TestabilityTestbenchesTiming AnalysisTiming ClosureAsynchronous Circuit DesignAsynchronous Sequential CircuitsSelf-test Architecture
25
Digital Systems : Testing and Testable Design
European Journal of Operational Research · 1990 · 1.5K citations
Engineering, Computer Engineering, Systems Engineering +14
An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
Goel · IEEE Transactions on Computers · 1981 · 1.1K citations
Engineering, Computer Engineering, Computer Science +12
On the Acceleration of Test Generation Algorithms
Fujiwara, Shimono · IEEE Transactions on Computers · 1983 · 823 citations
Engineering, Computer Engineering, Computer Science +9
Asynchronous Sequential Switching Circuits
S.H. Unger, Stephen Y. H. Su · IEEE Transactions on Systems Man and Cybernetics · 1973 · 584 citations
On Delay Fault Testing in Logic Circuits
Chin Jen Lin, S.M. Reddy · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1987 · 562 citations
Engineering, Computer Engineering, Electrical Engineering +16