IEE Proceedings - Circuits Devices and Systems · 2004 · 25 citations · 14 references
EngineeringElectrical EngineeringCircuit TheoryMicroelectronicsSemiconductor DevicesCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyCurrent-voltage CharacteristicsIntegrated Circuit DesignTemperature ControlTemperature RegulationReference Voltage DesignTemperature DependenceThreshold VoltageThreshold Voltage ControlThreshold Voltage ModelingVoltage Reference CircuitsVoltage Reference DesignVoltage References
The authors propose a CMOS voltage reference that exploits the temperature dependence of NMOS and PMOS threshold voltages to achieve temperature insensitivity. The design omits diodes and parasitic bipolar transistors, supports a wide output voltage range, and is implemented on a 0.5 µm CMOS test chip. The prototype delivers a temperature coefficient of 32 ppm/°C over –10 °C to 80 °C and a supply‑voltage sensitivity of 10 mV/V.
The paper describes a CMOS voltage reference design that uses the temperature dependence of NMOS and PMOS threshold voltages to form a temperature-insensitive reference. No diodes or parasitic bipolar transistors are used. The circuit architecture accommodates a wide range of output voltages. A test chip is fabricated using a 0.5 μm CMOS process. The prototype achieves a temperature coefficient of 32 ppm/°C for a temperature range of −10°C to 80°C and a supply voltage sensitivity of 10 mV/V.
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A CMOS bandgap reference circuit with sub-1-V operation
H. Banba, H. Shiga, Akira Umezawa et al. · IEEE Journal of Solid-State Circuits · 1999 · 886 citations