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A new flash E<sup>2</sup>PROM cell using triple polysilicon technology
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1984
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Non-volatile MemoryMiniaturizationEngineeringEmerging Memory TechnologyComputer ArchitectureSelect TransistorIntegrated CircuitsComputer MemoryNew Flash EAdvanced Packaging (Semiconductors)Memory DevicesElectronic PackagingElectrical EngineeringElectronic MemoryFlash MemoryComputer EngineeringField EmissionMicroelectronicsMemory ReliabilitySingle TransistorSemiconductor MemoryTechnology
A new Flash Electrically Erasable-PROM cell with single transistor per bit as same as conventional UV-EPROM(1) (2) and suitable for 256K bit F-E <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> PROM with rather conservative 2.0µm design rule is described. The cell is programmed by a channel hot carrier injection mechanism similar to EPROM. The contents of all memory cells are simultaneously erased by using field emission of electrons from a floating gate to an erase gate in a flash. The F-E <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> PROM cell with single transistor per bit consists of three layers of polysilicon with select transistor. (3) (4) (5) Programming is 10msec per bit as same as UV-EPROM. Good erasing characteristics is obtained with 550Å of oxide thickness between floating gate and erase gate.