Fabrication of Deep Sub-µm Narrow-Channe1 Si-MOSFET's with Twofold-Gate Structures

Abstract

Deep sub-µm narrow-channel Si metal-oxide-semiconductor field-effect transistors (Si-MOSFFT's) are fabricated using conventional LSI processes together with electron beam lithography. The device comprises a twofold-gate structure in which a narrow gate is covered with a wide gate. With this structure, effective channel widths can be narrower than those achieved by lithography. Peak-and-valley structures are found in transconductance at low temperatures. They are thought to originate in quasi-one-dimensional subbands.