2012 · 15 citations · 9 references
EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSystem-on-chip DesignCmos Circuit DesignIntegrated Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationRadio-frequency Integrated CircuitsCmos Analog Circuit DesignCmos Analog Integrated CircuitsDropoutDropout VoltageExternal CompensationLow-dropout Regulator DesignLow-dropout RegulatorsRf Cmos Design
A CMOS low dropout linear regulator (LDO) with a MESFET based follower output stage was designed and fabricated on a commercial 45nm SOI CMOS technology. The proposed LDO demonstrates a dropout voltage of <;170mV at 1A load current while occupying 0.245mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of die area. The approach includes a novel depletion mode n-channel MESFET in a low output impedance source follower configuration. This enables the LDO to achieve stable operation under all line and load conditions without the need for generating higher internal voltage rails or external compensation. The compact structure and its inherent stability make it ideal for high powered analog, mixed signal and RF system-on-chip applications that require high PSR under different loading conditions.
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