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CMOS-Compatible SOI MESFETs With High Breakdown Voltage
92
Citations
10
References
2006
Year
Cmos-compatible Soi MesfetsElectrical EngineeringEngineeringVlsi DesignBias Temperature InstabilityFoundry Process FlowApplied PhysicsCmos TechnologySoi CmosIntegrated CircuitsSilicon On InsulatorMicroelectronicsBeyond CmosSemiconductor DeviceDrain Bias
The authors demonstrate that silicon-on-insulator (SOI) MESFETs can be fabricated alongside SOI CMOS with no changes to the foundry process flow. The MESFETs operate in depletion mode with a threshold voltage of -0.6 V for a gate length of 0.6 mum. The breakdown voltage of the MESFETs greatly exceeds that of the CMOS devices and varies in the range of 12-58 V depending upon the channel access length, i.e., the distance from the edge of the gate to the edge of the drain region. For MESFETs with a gate length of 0.6 mum and an access length of 0.6 mum, the peak cutoff frequency exceeds 7 GHz. The maximum available gain increases with drain bias and values of f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> range from 17 GHz at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> = 2 V to 22 GHz at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> = 8 V
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