IEEE Transactions on Instrumentation and Measurement · 2007 · 27 citations · 27 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsTest DevelopmentAnalog Integrated CircuitsBuilt-in Self-testDesign For TestabilityDigital Integrated Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationAnalog Built-in Self-testAnalog TestabilityAnalog-to-digital Converter DesignAnalog-to-digital ConvertersBuilt-in Self-test For Analog CircuitsDigital Circuit Self-testingTest Performance Characteristics
This paper presents a deterministic dynamic element matching (DDEM) approach, which is applied to low-precision digital-to-analog converters (DACs) to generate uniformly spaced voltage samples for analog-to-digital converter (ADC) testing. Theoretical analysis is provided to show the test performance using this DDEM DAC. Both simulation results and experimental results from a fabricated DDEM DAC are presented to verify the performance. The ADC testing performance, by using an 8-bit DDEM DAC (linearity less than 5 bits without DDEM), is comparable to the best results reported in the literature using on-chip linear ramp generators. The DDEM technique offers great potential for use in both production test and built-in-self-test (BIST) environments.
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