IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1988 · 42 citations · 20 references
EngineeringComputer EngineeringComputer ScienceFault-tolerant ComputingFault-tolerant SystemsTest ConstructionDesign For TestabilityDigital Logic DesignFault DetectionArithmetic Logic DescriptionArithmetic Logic Unit ArchitectureArithmetic Logic Unit DesignFault CoverageFault Coverage AnalysisFault Coverage ModelingStuck-at Fault Testing
A simulation study of the 74LS181 4-b ALU (arithmetic logic unit) using 16 complete single stuck-at fault test sets demonstrated significantly higher multiple stuck-at fault coverage than predicted by previous theoretical studies. Analysis of the undetected multiple faults shows the effect of circuit and test set characteristics on fault coverage. A fault masking property, defined as self-masking, is observed for the undetected faults in the simulation study. A heuristic is described for evaluating the multiple fault coverage of single stuck-at fault test sets. A second heuristic generates augmented test sets, providing improved multiple stuck-at fault coverage with a minimal increase in test set development cost.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Micheál Jacob · Health Education Journal · 1989 · 3.1K citations · Full text
McCluskey, Bozorgui-Nesbat · IEEE Transactions on Computers · 1981 · 225 citations