Analysis of data-leak hardware Trojans in AES cryptographic circuits

Abstract

This study examines the impact of 18 hardware Trojans inserted into an AES (Advanced Encryption Standard) cryptographic circuit in terms of area, leakage power, and dynamic power. These Trojans were supplied from the Trust-HUB repository. This study was performed by first synthesizing the designs to 90-nm and 45-nm standard cell libraries. Then, those designs were compared to the Trojan-free circuit synthesized to the corresponding technology. All of these Trojans had very small footprints on the design in terms of area and power. Furthermore, despite all of the Trojans leaking the key in some way, the measured footprints fell over a wide range.