2013 · 28 citations · 12 references
EngineeringElectrical EngineeringSemiconductor DevicesSemiconductor MaterialsVlsi DesignCmos Circuit DesignDielectricsDopingMetal-oxide-semiconductor Field-effect TransistorsOxide SemiconductorsSemiconductor Device MaterialsElectric Field DistributionElectric Field EffectsGate DielectricsGate OxidesOxide Layer EngineeringSiliconSilicon Doping
An ultra-low specific on-resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on, sp</sub> ) high voltage trench SOI LDMOS based on the enhanced bulk field (ENBULF) concept is proposed. The key feature of this new device is heavily doped N/P pillars parallel to the trench oxide layer. The bulk electric field of the trench LDMOS is enhanced both in the dielectric and the silicon layer by using the N/P pillars. Firstly, the highly doped N/P pillars introduce two new electric field peaks in the bulk of the drift region, which enhances the bulk electric fields both under the drain and source. Secondly, the additional electric field of the trench oxide layer is produced by N/P pillars, leading to a shrink of the drift area. Thirdly, the enhanced dielectric layer field (ENDIF) effect of the BOX layer occurs self-adaptively with different thicknesses of the BOX layer. Combining the trench and SJ technologies, the cell pitch is reduced and the optimized doping concentration of the drift region is increased. The R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on,sp</sub> is therefore reduced efficiently. The 2-D analytical model of the ENBULF LDMOS is developed to guide the design of the novel device. Based on the model and the simulation, the ENBULF LDMOS exhibits a offstate BV of 684 V and a R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on, sp</sub> of 48.5 mΩ·cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The new device breaks through the silicon limit in a wide applied voltage levels.
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