Comprehensive defect avoidance framework for mitigating EUV mask defects

Abstract

Defect avoidance methods are likely to play a key role in overcoming the challenge of mask blank defects in EUV lithography. In this work, we propose a novel EUV mask defect avoidance method. It is the first approach that allows exploring all the degrees of freedom available for defect avoidance (pattern shift, rotation and mask floorplanning). We model the defect avoidance problem as a global, non-convex optimization problem and then solve it using a combination of random walk and gradient descent. For a 8nm polysilicon layer of an ARM Cortex M0 layout, our method achieves 60% point better mask yield compared to prior art in defect avoidance for a 40-defect mask.