Skewed-Load Transition Test: Part I, Calculus

An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits

 Goel · IEEE Transactions on Computers · 1981 · 1.1K citations

Engineering, Computer Engineering, Computer Science +12

A logic design structure for LSI testability

E. B. Eichelberger, T.W. Williams · Design Automation Conference · 1977 · 837 citations

Engineering, Computer Engineering, Computer Systems +14

Model for Delay Faults Based Upon Paths

Gordon L. Smith · International Test Conference · 1985 · 710 citations

Engineering, Computer Engineering, Computer Science +14

Built-in test for VLSI — pseudorandom techniques

Colin Maunder · Microprocessors and Microsystems · 1989 · 639 citations

Engineering, Computer Engineering, Electrical Engineering +13

Probabilistic Treatment of General Combinational Networks

Kenneth P. Parker, E.J. McCluske · IEEE Transactions on Computers · 1975 · 435 citations

Natural Sciences, Computer Science, Mathematics +15