Model for Delay Faults Based Upon Paths

Timing Analysis of Computer Hardware

Robert B. Hitchcock, Gordon L. Smith, David D. Cheng · IBM Journal of Research and Development · 1982 · 341 citations

Engineering, Computer Engineering, Computer Science +12

An Experimental Delay Test Generator for LSI Logic

Lesser, Shedletsky · IEEE Transactions on Computers · 1980 · 170 citations

Engineering, Computer Engineering, Electrical Engineering +17

Testing for Timing Faults in Synchronous Sequential Integrated Circuits.

Yashwant K. Malaiya, Ramesh Narayanaswamy · International Test Conference · 1983 · 61 citations

Engineering, Computer Engineering, Computer Science +12

Analysis of Timing Failures Due to Random AC Defects in VLSI Modules

Nandakumar N. Tendolkar · 1985 · 45 citations

Engineering, Computer Engineering, Electrical Engineering +17

Delay test simulation

T. Storey, Jordan Barry · Design Automation Conference · 1977 · 39 citations

Engineering, Computer Engineering, Computer Science +14