Publication | Closed Access
A Multi-Layer Stackable Thin-Film Transistor (TFT) NAND-Type Flash Memory
70
Citations
5
References
2006
Year
Unknown Venue
Non-volatile MemoryEngineeringEmerging Memory TechnologyComputer ArchitectureBottom LayerIntegrated Circuits3D MemoryNanoelectronicsMemory DeviceMemory DevicesElectrical EngineeringElectronic MemoryFlash MemoryComputer EngineeringTft DeviceMicroelectronicsNand-type Flash MemoryApplied PhysicsSemiconductor Memory3D Integration
A double-layer TFT NAND-type flash memory is demonstrated, ushering into the era of three-dimensional (3D) flash memory. A TFT device using bandgap engineered SONOS (BE-SONOS) (Lue et al., 2005, Lai et al., 2006) with fully-depleted (FD) poly silicon (60 nm) channel and tri-gate P <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -poly gate is integrated into a NAND array. Small devices (L/W=0.2/0.09 mum) with excellent performance and reliability properties are achieved. The bottom layer shows no sign of reliability degradation compared to the top layer, indicating the potential for further multi-layer stacking. The present work illustrates the feasibility of 3D flash memory
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