SiGeO layer formation mechanism at the SiGe/oxide interfaces during Ge condensation

Abstract

The letter presents the fabrication processes to realize high Ge content SiGe on insulator using Ge condensation technique with and without intermittent oxide etching. During condensation process with intermittent silicon oxide etching, the formation of an undesirable amorphous SiGeO is observed. This is due to uncontrolled oxidation of silicon when the oxide layer is etched away. In the case of Ge condensation process without oxide etching, the authors could achieve a SiGe layer with 91% Ge concentration. A crystalline SiGeO layer at the interfaces of the top silicon oxide and buried oxide with SiGe was also observed. Possible formation mechanisms of amorphous and crystalline SiGeO are presented. Ge condensation process without SiO2 etching utilizes four steps of oxidation and intermittent annealing cycles at each temperature resulted in Si0.09Ge0.91OI substrate.