A neural network integrated circuit utilizing programmable threshold voltage devices

T. Borgstrom, S. Bibyk

2003 · 10 citations · 5 references

Concepts

Abstract

A reconfigurable neural network architecture suitable for CMOS VLSI fabrication is introduced. Essential elements of this architecture, including a novel and compact programmable synaptic element and a summing/thresholding amplifier, are presented and analyzed. The progress made towards the fabrication of this design by the MOSIS 2- mu m, double-poly, p-well process is discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

5