Bit-line clamped sensing multiplex and accurate high-voltage generator for 0.25 μm flash memories

Abstract

A 105.9 mm/sup 2/ 128 Mb experimental chip using 0.25 /spl mu/m technology demonstrates the feasibility of circuits that take advantage of the potential scalability of flash memory cells and an accurate internal voltage generator that operates at 2.5 V Vcc: (1) a layout-pitch-relaxing bit-line clamped sensing multiplex and intermittent-burst data transfer (four phases with 500 ns/20 ns) for a 3F (F=feature size) pitch, and (2) a 5 /spl mu/A dynamic band-gap generator under a boosted voltage using triple-well bipolar transistors and a voltage doubler charge pump, for accurate 10 to 20 V generation.