A 143MHz 1.1W 4.5Mb dynamic TCAM with hierarchical searching and shift redundancy architecture

Haruhiko Noda, Kazunari Inoue, M. Kuroiwa, A. Amo, A. Hachisuka, Hans Jürgen Mattausch, Tetsushi Koide, S. Soeda, K. Dosaka, K. Arinnoto

2004 · 22 citations · 3 references

Concepts

Abstract

A 4.5 Mb dynamic ternary CAM (DTCAM) is designed in 0.13 /spl mu/m embedded DRAM technology. A performance of 143 M searches/sec is achieved at a power dissipation of 1.1 W and on a small silicon area of 32 mm/sup 2/. A 3.6-times yield improvement is estimated by employing pipelined hierarchical searching and row/column-shift redundancy.

References

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