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Phase-change memory driven by poly-Si MOS transistor with low cost and high-programming gigabyte-per-second throughput
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2011
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Non-volatile MemoryEngineeringMemory DesignEmerging Memory TechnologyPoly-si Mos TransistorComputer ArchitecturePoly-si Mos TransistorsIntegrated CircuitsPhase Change MemoryComputer MemoryCell SizeMemory DeviceMemory DevicesPhase-change MemoryLow CostElectrical EngineeringComputer EngineeringMicroelectronicsMemory ReliabilityMicrofabricationSemiconductor Memory
A phase-change memory (PCM) driven by poly-Si MOS transistors was fabricated. The thin phase-change-material layer deposited directly on the channel silicon layer in the PCM enables low-current reset operation (45 µA) compared to the conventional memory structure. This memory-cell configuration enables both a poly-Si MOS-driven stackable memory array and large degree programming parallelization. A contactless simple cell structure makes it possible to reduce the cell size to 4F2 and the number of process steps. Low cost and gigabyte-per-second programming throughput are thus made possible by this stackable phase-change memory.