Voltage-dependent Delay

Voltage-Dependent Delay is a delay modeling construct that characterizes the propagation latency of a signal in a digital circuit as a function of the supply voltage, distinguishing itself from other delay models by explicitly incorporating voltage-induced variations in transistor switching behavior.

111

Publications

6.2K

Citations

358

Authors

131

Institutions

Publications per year

2017–2026

12

Authors

358

  1. MS
    Manoj Sachdev

    University of Waterloo, Canada

    3 publications · 281 citations

    3

    h-index

  2. CC
    Changguo Chen

    Chongqing University, China

    3 publications · 49 citations

    3

    h-index

  3. MH
    Masanori Hashimoto

    The University of Osaka, Japan

    3 publications · 81 citations

    3

    h-index

  4. DB
    David Blaauw

    University of Michigan, United States

    3 publications · 499 citations

    3

    h-index

  5. TS
    Takashi Satō

    Kyoto University, Japan

    2 publications · 49 citations

    2

    h-index

1–5 of 358

Venues

  1. IEEE Journal of Solid-State Circuits

    9 publications · 1.1K citations

    9

    h-index

  2. IEEE Transactions on Electron Devices

    7 publications · 827 citations

    7

    h-index

  3. 5

    h-index

  4. 3

    h-index

  5. IEEE Electron Device Letters

    3 publications · 48 citations

    3

    h-index

1–5