Sub-threshold Operation
Sub-Threshold Operation is a low-power integrated circuit design technique in which transistors operate in the sub-threshold region, below the threshold voltage, to achieve ultra-low energy consumption by exploiting exponential current-voltage characteristics.
680
Publications
25.4K
Citations
2.6K
Authors
611
Institutions
Publications per year
2017–2026
186
Parents
680
1–5 of 680
2.6K
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Massachusetts Institute of Technology, United States
16 publications · 2.4K citations
13
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9
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8
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1–5 of 2.6K
611
Purdue University West Lafayette
West Lafayette, United States
20 h-index
103 publications
4.2K citations
Massachusetts Institute of Technology
Cambridge, United States
17 h-index
43 publications
5.7K citations
University of Virginia
Charlottesville, United States
15 h-index
58 publications
2.2K citations
Intel (United States)
Santa Clara, United States
15 h-index
61 publications
3.7K citations
The University of Tokyo
Tokyo, Japan
14 h-index
68 publications
2K citations
National University of Singapore
Singapore, Singapore
14 h-index
34 publications
1.3K citations
University of California, Berkeley
Berkeley, United States
11 h-index
30 publications
1.8K citations
IMEC
Leuven, Belgium
11 h-index
79 publications
1.8K citations
1–8 of 611
31 publications · 1.3K citations
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21 publications · 2.1K citations
16
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18 publications · 517 citations
15
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16 publications · 754 citations
13
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15 publications · 469 citations
13
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