Static Cmos Circuits
Static CMOS Circuits is a digital integrated circuit design methodology that belongs to the class of complementary metal-oxide-semiconductor (CMOS) logic families, distinguished by its use of a permanent, direct connection between the output node and either the supply voltage or ground through a pair of complementary MOSFETs, ensuring stable output levels and negligible static power consumption under steady-state conditions.
351
Publications
13.8K
Citations
939
Authors
247
Institutions
Publications per year
2017–2026
16
Parents
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1–5 of 351
939
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IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
15 h-index
34 publications
2.1K citations
Intel (United States)
Santa Clara, United States
14 h-index
40 publications
2.3K citations
IBM (United States)
Armonk, United States
13 h-index
61 publications
2.3K citations
University of Washington
Seattle, United States
11 h-index
31 publications
771 citations
Purdue University West Lafayette
West Lafayette, United States
10 h-index
20 publications
652 citations
University of Michigan
Ann Arbor, United States
8 h-index
18 publications
605 citations

Gifu University
Gifu City, Japan
8 h-index
23 publications
721 citations
Infineon Technologies (Germany)
Munich, Germany
7 h-index
22 publications
580 citations
1–8 of 247
42 publications · 3.3K citations
26
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18 publications · 591 citations
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17 publications · 1.1K citations
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8 publications · 436 citations
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6 publications · 430 citations
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