Static Cmos Circuits

Static CMOS Circuits is a digital integrated circuit design methodology that belongs to the class of complementary metal-oxide-semiconductor (CMOS) logic families, distinguished by its use of a permanent, direct connection between the output node and either the supply voltage or ground through a pair of complementary MOSFETs, ensuring stable output levels and negligible static power consumption under steady-state conditions.

351

Publications

13.8K

Citations

939

Authors

247

Institutions

Publications per year

2017–2026

16

Authors

939

  1. CS
    Carl Sechen

    University of Washington, United States

    12 publications · 305 citations

    11

    h-index

  2. KR
    Kaushik Roy

    Purdue University West Lafayette, United States

    10 publications · 375 citations

    10

    h-index

  3. TS
    Toshikazu Sekine

    Gifu University, Japan

    9 publications · 272 citations

    9

    h-index

  4. YT
    Yasuhiro Takahashi

    Gifu University, Japan

    9 publications · 272 citations

    9

    h-index

  5. GY
    Gin Yee

    University of Washington, United States

    7 publications · 220 citations

    7

    h-index

1–5 of 939

Venues

  1. IEEE Journal of Solid-State Circuits

    42 publications · 3.3K citations

    26

    h-index

  2. IEEE Transactions on Nuclear Science

    18 publications · 591 citations

    16

    h-index

  3. 16

    h-index

  4. 8

    h-index

  5. IEEE Transactions on Computers

    6 publications · 430 citations

    6

    h-index

1–5