N. Ranganathan - Concepedia

Author

N. Ranganathan

Also Known As

Gavrilova, Marina L, N R Ranganathan, N Ranganathan, N. R. Ranganathan, N. RANGANATHAN, N. Ranganathan, N.R Ranganathan, N.R. Ranganathan, Nagarajan Ranganathan, Neha Ranganathan

363

Publications

5.7K

Citations

H-Index

246

Concepts

All Affiliations

University of South Florida Institute of Microelectronics Agency for Science, Technology and Research University of North Texas

About

N. Ranganathan is an author at University of South Florida specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	37	119	4.8K
2	Business	7	7	145
3	Management	3	3	60
4	Education	2	2	35
5	Health Sciences	1	1	14

N. Ranganathan

128

Publications

Citations

H-Index

Page 1

	Year	Citations
High-performance flow-focusing geometry for spontaneous generation of monodispersed droplets Levent Yobaş, Stefan Martens, Wee‐Liat Ong, Lab on a Chip EngineeringPhysicsMicrofabricationSpontaneous GenerationFluid Mechanics	2006	281
LECTOR: a technique for leakage reduction in CMOS circuits Narender Hanchate, N. Ranganathan IEEE Transactions on Very Large Scale Integration (VLSI) Systems Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignCircuit System	2004	228
Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs Himanshu Thapliyal, N. Ranganathan ACM Journal on Emerging Technologies in Computing Systems Quantum CostReversible LogicEngineeringVlsi DesignReversible Gates	2010	218
A study of thermo-mechanical stress and its impact on through-silicon vias N. Ranganathan, K. Prasad, N. Balasubramanian, Journal of Micromechanics and Microengineering EngineeringMechanical EngineeringNormal Bosch ProcessSilicon On InsulatorThermo-mechanical Stress	2008	167
Design of Testable Reversible Sequential Circuits Himanshu Thapliyal, N. Ranganathan, Saurabh Kotiyal IEEE Transactions on Very Large Scale Integration (VLSI) Systems Hardware SecurityEngineeringCircuit DesignMem TestingSoftware Testing	2012	147
Design of Efficient Reversible Binary Subtractors Based on a New Reversible Gate Himanshu Thapliyal, N. Ranganathan Quantum ScienceReversible LogicEngineeringQuantum ComputingCircuit Design	2009	144
Reversible Logic-Based Concurrently Testable Latches for Molecular QCA Himanshu Thapliyal, N. Ranganathan IEEE Transactions on Nanotechnology Quantum ScienceQuantum LogicEngineeringQuantum ComputingConservative Logic	2009	139
JAGUAR: a fully pipelined VLSI architecture for JPEG image compression standard Mario Kovač, N. Ranganathan Proceedings of the IEEE Entire ArchitectureLossy CompressionImage AnalysisEngineeringImage Coding	1995	115
Development of through silicon via (TSV) interposer technology for large die (21&#x00D7;21mm) fine-pitch Cu/low-k FCBGA package Xiaowu Zhang, T.C. Chai, John H. Lau, EngineeringComputer ArchitectureLarge DieInterconnect (Integrated Circuits)Advanced Packaging (Semiconductors)	2009	109
Design of a Reversible ALU Based on Novel Programmable Reversible Logic Gate Structures Matthew Morrison, N. Ranganathan Hardware SecurityLogic SynthesisElectrical EngineeringReversible LogicEngineering	2011	98

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