Concepedia

Register-transfer Level Design

Register-Transfer Level Design is a digital hardware design abstraction and methodology in which a system is specified in terms of clocked registers, the transfer of data between them, and the intervening combinational operations, thereby providing a synthesizable, cycle-accurate specification that bridges high-level behavioral descriptions and gate-level or physical implementations.

964

Publications

34.9K

Citations

2.4K

Authors

563

Institutions

Publications per year

2017–2026

79

Variants

Register Transfer Level DesignRegister-transfer Level ModelingRtl Design

Parents

Children

Publications

964

Ramulator: A Fast and Extensible DRAM Simulator

Yoongu Kim, Weikun Yang, Onur Mutlu · IEEE Computer Architecture Letters · 2015 · 741 citations · Full text

, , +15

The high-level synthesis of digital systems

M.C. McFarland, Alice C. Parker, Raúl Camposano · Proceedings of the IEEE · 1990 · 627 citations

, , +14

Automated Synthesis of Data Paths in Digital Systems

Chia-Jeng Tseng, Daniel P. Siewiorek · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1986 · 569 citations

, , +17

RT-level ITC'99 benchmarks and first ATPG results

Fulvio Corno, M. Sonza Reorda, Giovanni Squillero · IEEE Design & Test of Computers · 2000 · 535 citations

, , +17

An Introduction to High-Level Synthesis

Philippe Coussy, Daniel D. Gajski, M. Meredith et al. · IEEE Design & Test of Computers · 2009 · 496 citations

, , +14

1–5 of 964

Authors

2.4K

  1. NK
    Niraj K. Jha

    Princeton University, United States

    26 publications · 1K citations

    20

    h-index

  2. AR
    Anand Raghunathan

    Princeton University, United States

    17 publications · 773 citations

    15

    h-index

  3. IG
    Indradeep Ghosh

    Fujitsu (United States), United States

    14 publications · 474 citations

    11

    h-index

  4. AC
    Alice C. Parker

    University of Southern California, United States

    10 publications · 1.2K citations

    10

    h-index

  5. DP
    Daniel P. Siewiorek

    Carnegie Mellon University, United States

    10 publications · 884 citations

    10

    h-index

1–5 of 2.4K

Institutions

563

  1. Princeton University

    Princeton, United States

    26 h-index

    79 publications

    3.2K citations

  2. Intel (United States)

    Santa Clara, United States

    21 h-index

    55 publications

    3.1K citations

  3. Carnegie Mellon University

    Pittsburgh, United States

    21 h-index

    62 publications

    6.1K citations

  4. IBM (United States)

    Armonk, United States

    18 h-index

    84 publications

    2.6K citations

  5. University of Southern California

    Los Angeles, United States

    15 h-index

    48 publications

    2.3K citations

  6. University of California, Berkeley

    Berkeley, United States

    14 h-index

    35 publications

    2.2K citations

  7. University of California, Los Angeles

    Los Angeles, United States

    13 h-index

    43 publications

    1.7K citations

  8. Centre National de la Recherche Scientifique

    Paris, France

    13 h-index

    28 publications

    990 citations

1–8 of 563

Venues

  1. 35

    h-index

  2. 25

    h-index

  3. IEEE Transactions on Computers

    27 publications · 1.2K citations

    19

    h-index

  4. IEEE Journal of Solid-State Circuits

    25 publications · 1.2K citations

    17

    h-index

  5. 12

    h-index

1–5