Bus Architecture

Bus Architecture is a hardware interconnect architecture that defines a shared communication pathway and its associated protocols for transferring data and control signals between multiple components within a computing system, distinguished by its centralized, parallel or serial transmission medium that enables coordinated, often time-multiplexed, access among heterogeneous system modules.

595

Publications

18.2K

Citations

1.6K

Authors

510

Institutions

Publications per year

2017–2026

Variants

Bus System

Parents

Dimensional ModelingHardware ArchitectureInterconnect ArchitectureRegister-transfer Level Design

Publications

595

The Information Bus

Brian Oki, Manfred Pfluegl, Alex Siegel et al. · 1993 · 404 citations · Full text

Computing, Computer Science, Computer Systems +17

Communication Structures for Large Networks of Microcomputers

Wittie · IEEE Transactions on Computers · 1981 · 261 citations

Engineering, Computer Engineering, Computer Science +17

The QPSX MAN

Robert Newman, Z. L. Budrikis, J.L. Hulett · IEEE Communications Magazine · 1988 · 249 citations

Computing, Computer Science, Computer Systems +17

Parallel computations on reconfigurable meshes

Russ Miller, V. K. Prasanna-Kumar, Dionysios Reisis et al. · IEEE Transactions on Computers · 1993 · 249 citations · Full text

Engineering, Computer Engineering, Computer Science +15

A self-coördinating bus route to resist bus bunching

John J. Bartholdi, Donald D. Eisenstein · Transportation Research Part B Methodological · 2012 · 239 citations

Management, Transportation Planning, Transport +9

1–5 of 595

Authors

1.6K

ND
Nikil Dutt
University of California, Irvine, United States
13 publications · 496 citations
13
h-index
SP
Sudeep Pasricha
Colorado State University, United States
12 publications · 479 citations
12
h-index
AR
Anand Raghunathan
Princeton University, United States
9 publications · 417 citations
9
h-index
KL
Kanishka Lahiri
University of California San Diego, United States
7 publications · 321 citations
7
h-index
JP
Juha Plosila
University of Turku, Finland
6 publications · 122 citations
6
h-index

1–5 of 1.6K

Institutions

510

1–8 of 510

Venues

IEEE Transactions on Computers
23 publications · 1.3K citations
16
h-index
IEEE Micro
18 publications · 804 citations
15
h-index
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
14 publications · 408 citations
13
h-index
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
10 publications · 485 citations
10
h-index
ACM SIGARCH Computer Architecture News
7 publications · 169 citations
7
h-index

1–5