Concepedia

Redundancy Logic

Redundancy Logic is a design methodology in digital logic systems that belongs to the class of fault-tolerant techniques, distinguished by its deliberate incorporation of extra logical components or pathways to ensure functional correctness in the presence of hardware faults or signal inconsistencies.

18

Publications

814

Citations

57

Authors

23

Institutions

Publications per year

2017–2026

4

Parents

Publications

18

On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs

Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Carro et al. · Design, Automation, and Test in Europe · 2005 · 241 citations · Full text

, , +17

Memory built-in self-repair using redundant words

V. Schober, Steffen Paul, O. Picot · 2002 · 95 citations

, , +14

Self-Voting Dual-Modular-Redundancy Circuits for Single-Event-Transient Mitigation

John Teifel · IEEE Transactions on Nuclear Science · 2008 · 87 citations

, , +11

Piercing Logic Locking Keys through Redundancy Identification

Leon Li, Alex Orailoğlu · 2019 · 62 citations

, , +14

An 800-MHz embedded DRAM with a concurrent refresh mode

T. Kirihata, P. Parries, David R. Hanson et al. · IEEE Journal of Solid-State Circuits · 2005 · 50 citations

, , +17

1–5 of 18

Authors

57

  1. LC
    Luigi Carro

    Universidade Federal do Rio Grande do Sul, Brazil

    2 publications · 265 citations

    2

    h-index

  2. FL
    Fernanda Lima Kastensmidt

    Universidade Federal do Rio Grande do Sul, Brazil

    2 publications · 265 citations

    2

    h-index

  3. VB
    V. Baena-Lecuyer

    Universidad de Sevilla, Spain

    1 publications · 16 citations

    1

    h-index

  4. FL
    Fabrizio Lombardi

    Northeastern University, United States

    1 publications · 28 citations

    1

    h-index

  5. JT
    John Teifel

    Cornell University, United States

    1 publications · 87 citations

    1

    h-index

1–5 of 57

Institutions

23

  1. Universidade Estadual do Rio Grande do Sul

    Porto Alegre, Brazil

    2 h-index

    2 publications

    265 citations

  2. Universidade Federal do Rio Grande do Sul

    Porto Alegre, Brazil

    2 h-index

    4 publications

    530 citations

  3. Universidad de Sevilla

    Seville, Spain

    1 h-index

    8 publications

    128 citations

  4. University of Iowa

    Iowa City, United States

    1 h-index

    2 publications

    88 citations

  5. Politecnico di Torino

    Turin, Italy

    1 h-index

    2 publications

    482 citations

  6. NTT (Japan)

    Tokyo, Japan

    1 h-index

    1 publications

    16 citations

  7. Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology

    Chennai, India

    1 h-index

    1 publications

    21 citations

  8. IBM (United States)

    Armonk, United States

    1 h-index

    14 publications

    700 citations

1–8 of 23

Venues

  1. IEEE Transactions on Computers

    3 publications · 86 citations

    3

    h-index

  2. IEEE Transactions on Nuclear Science

    2 publications · 111 citations

    2

    h-index

  3. IEEE Journal of Solid-State Circuits

    2 publications · 78 citations

    2

    h-index

  4. VLSI design

    1 publications · 21 citations

    1

    h-index

  5. Design, Automation, and Test in Europe

    Conference · 1 publications · 241 citations

    1

    h-index

1–5