Concepedia

Pin Placement Optimization

Pin Placement Optimization is a method in standard cell design that determines the optimal spatial arrangement of terminal connections on a cell boundary to minimize parasitic effects, improve routability, and enhance circuit performance while adhering to design rules and layout constraints.

50

Publications

1.3K

Citations

146

Authors

69

Institutions

Publications per year

2017–2026

11

Parents

Publications

50

NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs

Meng-Kai Hsu, Yifang Chen, Chau-Chin Huang et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2014 · 94 citations

, , +16

Single-layer fanout routing and routability analysis for Ball Grid Arrays

Man-Fai Yu, Wayne Wei-Ming Dai · 1995 · 71 citations

, , +16

Shape optimization of hotspot targeted micro pin fins for heterogeneous integration applications

Najmeh Fallahtafti, Srikanth Rangarajan, Yaser Hadad et al. · International Journal of Heat and Mass Transfer · 2022 · 53 citations

, , +14

Pin assignment in automated printed circuit board design

Norman L. Koren · 1972 · 45 citations · Full text

, , +13

Pin Accessibility-Driven Detailed Placement Refinement

Yixiao Ding, Chris Chu, Wai-Kei Mak · 2017 · 45 citations

, , +14

1–5 of 50

Authors

146

  1. YC
    Yao‐Wen Chang

    National Taiwan University, Taiwan

    5 publications · 192 citations

    5

    h-index

  2. WM
    Wai-Kei Mak

    National Tsing Hua University, Taiwan

    3 publications · 71 citations

    3

    h-index

  3. RA
    Ramachandra Achar

    Carleton University, Canada

    2 publications · 57 citations

    2

    h-index

  4. TY
    Tao-Chun Yu

    National Taiwan University of Science and Technology, Taiwan

    2 publications · 55 citations

    2

    h-index

  5. HC
    Hsien-Shih Chiu

    National Taiwan University of Science and Technology, Taiwan

    2 publications · 55 citations

    2

    h-index

1–5 of 146

Institutions

69

  1. National Taiwan University

    Taipei, Taiwan

    5 h-index

    15 publications

    762 citations

  2. IBM (United States)

    Armonk, United States

    4 h-index

    8 publications

    236 citations

  3. National Tsing Hua University

    Hsinchu, Taiwan

    3 h-index

    6 publications

    110 citations

  4. University of Illinois Urbana-Champaign

    Urbana, United States

    3 h-index

    7 publications

    123 citations

  5. National Taiwan University of Science and Technology

    Taipei, Taiwan

    2 h-index

    4 publications

    110 citations

  6. Motorola (United States)

    Schaumburg, United States

    2 h-index

    7 publications

    164 citations

  7. Carleton University

    Ottawa, Canada

    2 h-index

    2 publications

    57 citations

  8. University of California, Berkeley

    Berkeley, United States

    2 h-index

    4 publications

    48 citations

1–8 of 69

Venues

  1. 10

    h-index

  2. Design Automation Conference

    Conference · 3 publications · 47 citations

    3

    h-index

  3. 2

    h-index

  4. 1

    h-index

  5. Applied Nanoscience

    1 publications · 28 citations

    1

    h-index

1–5