Concepedia

Memory Refresh Techniques

Memory Refresh Techniques is a hardware-level methodology employed in dynamic random-access memory systems to periodically recharge capacitive storage elements, thereby preserving data integrity by counteracting charge leakage over time.

40

Publications

2.4K

Citations

160

Authors

46

Institutions

Publications per year

2017–2026

11

Parents

Publications

40

An experimental study of data retention behavior in modern DRAM devices

Jamie Liu, Ben Jaiyen, Yoongu Kim et al. · 2013 · 287 citations

, , +16

AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems

Moinuddin K. Qureshi, Dae-Hyun Kim, Samira Khan et al. · 2015 · 218 citations · Full text

, , +16

A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 $\times$ 128 I/Os Using TSV Based Stacking

Jung‐Sik Kim, Chi Sung Oh, Hocheol Lee et al. · IEEE Journal of Solid-State Circuits · 2011 · 203 citations

, , +16

DRAM Refresh Mechanisms, Penalties, and Trade-Offs

Ishwar Bhati, Mu-Tien Chang, Zeshan Chishti et al. · IEEE Transactions on Computers · 2015 · 149 citations

, , +17

Architectural Support for Mitigating Row Hammering in DRAM Memories

Dae-Hyun Kim, Prashant J. Nair, Moinuddin K. Qureshi · IEEE Computer Architecture Letters · 2014 · 145 citations

, , +13

1–5 of 40

Authors

160

  1. OM
    Onur Mutlu

    Carnegie Mellon University, United States

    7 publications · 964 citations

    7

    h-index

  2. MP
    Minesh Patel

    ETH Zurich, Switzerland

    3 publications · 215 citations

    3

    h-index

  3. JH
    Jung Ho Ahn

    Seoul National University, South Korea

    3 publications · 109 citations

    3

    h-index

  4. JS
    Jeremie S. Kim

    ETH Zurich, Switzerland

    3 publications · 215 citations

    3

    h-index

  5. NJ
    Naifeng Jing

    Shanghai Jiao Tong University, China

    2 publications · 80 citations

    2

    h-index

1–5 of 160

Institutions

46

  1. Carnegie Mellon University

    Pittsburgh, United States

    7 h-index

    21 publications

    3.1K citations

  2. Intel (United States)

    Santa Clara, United States

    5 h-index

    10 publications

    866 citations

  3. ETH Zurich

    Zurich, Switzerland

    4 h-index

    17 publications

    1K citations

  4. Samsung (South Korea)

    Seoul, South Korea

    3 h-index

    24 publications

    4.5K citations

  5. Seoul National University

    Seoul, South Korea

    3 h-index

    14 publications

    557 citations

  6. Georgia Institute of Technology

    Atlanta, United States

    2 h-index

    6 publications

    1.1K citations

  7. Shanghai Jiao Tong University

    Shanghai, China

    2 h-index

    12 publications

    480 citations

  8. IBM (United States)

    Armonk, United States

    2 h-index

    2 publications

    137 citations

1–8 of 46

Venues

  1. IEEE Journal of Solid-State Circuits

    4 publications · 260 citations

    4

    h-index

  2. IEEE Computer Architecture Letters

    3 publications · 245 citations

    3

    h-index

  3. IEEE Transactions on Computers

    3 publications · 236 citations

    3

    h-index

  4. ACM SIGARCH Computer Architecture News

    3 publications · 167 citations

    3

    h-index

  5. 1

    h-index

1–5